Rajarshi Mondal

+91 9163362827 | rajarshimondal21@gmail.com | linkedin.com/in/rajarshimondal21 | misternegative21.github.io/rajarshimondal | github.com/MISTERNEGATIVE21 | Kolkata, India
Professional Summary
M.Tech VLSI Design Engineer (VNIT Nagpur, CGPA 8.64) with a B.Tech in Applied Electronics & Instrumentation (CGPA 8.75) and 6+ years of hands-on enthusiast involvement in Linux environments, C/C++, and hardware prototyping. Specialized in ASIC/FPGA digital design, custom 32-bit RISC-V SoC architecture, and implementing Edge AI accelerators (int8 CNN) on Xilinx Zybo Z7 FPGAs. Accomplished across the full digital workflow—from Verilog RTL synthesis (Cadence Genus/DC Compiler) and DFT verification (Synopsys Tetramax/Assura) to embedded low-power IoT telemetry firmware and custom Linux OS distributions.
Core Competencies
VLSI & RTL Design (Verilog) FPGA AI Acceleration (Zybo Z7) 32-bit RISC-V SoC Architecture ASIC Synthesis (Cadence Genus / DC) DFT Verification (Tetramax / Assura) Embedded Systems & Firmware (C/C++) IoT Hardware & Sensor Telemetry Linux Internals & Arch Administration
Summer Internship Trainee
Tata Communications Limited Jun 2023 – Jul 2023
Summer Trainee | Kolkata, India
  • Gained hands-on training in Metropolitan Area Network (MAN) infrastructure, core networking concepts, and fiber optics technology.
  • Analyzed fiber transmission characteristics, splicing techniques, and practical fiber laying methodologies for enterprise telecommunication systems.
Key Projects & Technical Hardware
AI Accelerator (Edge AI on FPGA) Jun 2025 – Jun 2026
Designing and deploying a lightweight neural network / AI inference engine on FPGA fabric, turning the Zybo Z7 into a cost-effective Edge AI platform.
Tech: Xilinx Vivado, Verilog, Zybo Z7, Edge AI, Neural Network Quantization
CNN 64×64 int8 Image Engine
Engineered a Verilog CNN module for plant disease detection. Successfully deployed synthesizable RTL to Gate-level across multiple PDKs (ASAP 7nm, TSMC 130nm, GlobalFoundries 180nm).
Tech: Verilog, Cadence Genus, Synopsys DC Compiler, ASAP 7nm, TSMC 130nm, GF 180nm
32-bit RISC-V SoC for Game Controller Sep 2024
Architected and designed a 32-bit RISC-V System-on-Chip (SoC) specialized for real-time game controller peripheral management and signal decoding.
Tech: RISC-V, Verilog RTL, Digital Logic Design, SoC Architecture
DFT Verification of ISCAS 12-bit Adder
Performed complete Design-for-Testability (DFT) verification and fault coverage analysis on a 12-bit ISCAS benchmark adder using Synopsys Tetramax and Assura toolsets.
Tech: Synopsys Tetramax, Assura, DFT, Fault Modeling
IoT Smart Electric Meter Tampering & Soil Monitoring Systems 2025 – 2026
Designed ESP32 and EC200U-CN cellular IoT nodes with remote power gating, deep sleep optimization, and cloud telemetry to monitor soil health and prevent electrical meter tampering.
Tech: ESP32, Quectel EC200U, Flux.ai PCB, ConsentiumIoT, C/C++ Firmware
MATSYA OS & Plymouth Boot Maker
Built and maintained custom Linux distribution and C/Python bootloader utilities; experienced in kernel customization, Arch Linux administration, and FOSS upstream maintenance.
Tech: C, Python, Arch Linux, Kernel Build, Docker
Education
M.Tech — VLSI Design (CGPA: 8.64) Aug 2024 – Jun 2026
Visvesvaraya National Institute of Technology (VNIT), Nagpur, India
B.Tech — Applied Electronics and Instrumentation (CGPA: 8.75) 2020 – 2024
Heritage Institute of Technology, Kolkata, India
Senior Secondary School (12th) (CBSE: 84.2%) 2018 – 2020
DPS Ruby Park, Kolkata, India
Secondary School (10th) (ICSE: 91.0%) 2016 – 2018
Garden High School, Kolkata, India
Certifications & Training
Python Essentials 1 & 2 CISCO Network Academy 2022
Hands-On Machine Learning using Python Ardent Computech Pvt Ltd 2022
Introduction to IoT CISCO Network Academy 2022
Mobile & Web Design & Prototyping Udemy 2022
Technical Skills & Domain Knowledge
Hardware & RTL: Verilog, 32-bit RISC-V SoC Architecture, FPGA Design (Zybo Z7), Digital Logic, PCB Prototyping
EDA & TCAD Tools: Xilinx Vivado, Cadence Virtuoso, Cadence Genus, DC Compiler, Synopsys Tetramax, Assura, Sentaurus TCAD (SDevice/SDE), KiCad, Flux.ai, COMSOL Multiphysics
Programming Languages: C/C++, Embedded C, Python, Assembly, MicroPython, Shell Scripting
Embedded & IoT Systems: ESP32, Arduino, SPI/I2C/UART Protocols, Sensor Integration, Power Gating & Low-Power Optimization
Software & AI Tools: Arch Linux Administration, Docker, Git, PyTorch, TensorFlow, Scikit-learn, NumPy, Prompt Engineering